Confirm your eligibility
Check the degree, graduation window and work-authorization wording above against your own circumstances.
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ROLE RESEARCH · YOUR APPLICATION BRIEF
Optiver
InternshipFPGA Engineer Intern (Summer 2027 - Austin)
LocationAustin, Texas, United StatesNeeds confirmationAvailability unconfirmed
Understand the evidence. Check your fit. Make your next application count.
Source checked 2026-10-23 · Job / program ID: 8641352002
THE APPLICATION BRIEF
The essentials, before you apply.
Start with this role’s dated evidence, then confirm the details on the official posting.
- Application status
- Availability unconfirmed
- Work arrangement
- Not stated — confirm with the employer
- Application deadline
- No fixed deadline confirmed
- Sponsorship evidence
- Support stated in the evidence
Your next step
Check the remaining conditions with the employer.
- The recorded direction and program type are relevant. Confirm the remaining requirements before investing time.
Saving a record is free. It does not unlock a company review or consume a free company selection.
01 · Sponsorship evidence first
Sponsorship status
Support stated in the evidence
Optiver is supportive of US immigration sponsorship for this role.
The current Summer 2027 U.S. posting expressly states immigration support for this role. The visa category, candidate eligibility and any later full-time sponsorship must be confirmed individually; this is not a visa or return-offer guarantee.
Sponsorship evidence reviewed 2026-10-23. This does not refresh the job posting check below.
Evidence scope: Specific posting. A program policy and historical employer records do not establish support for every role.
Read the sponsorship source ↗02 · Requirements and your timeline
Check the actual eligibility requirements.
- Work arrangement
- Not stated — confirm with the employer
- Degree levels recorded
- bachelors · masters · phd
- Graduation window
- 2027-12 to 2028-06
- Start date
- Not confirmed
- Deadline
- No fixed deadline confirmed
- Minimum years of experience
- No numeric minimum confirmed
No fixed application closing date was stated in the reviewed complete official JD. Application availability remains unconfirmed.
Pursuing a bachelor’s, master’s or PhD in computer/electrical engineering or a related field; junior standing or higher and graduating December 2027–June 2028. Requires hands-on FPGA or ASIC digital design and VHDL, Verilog or SystemVerilog. Work concerns low-latency hardware and trading systems.
- Requires relevant digital-design/FPGA experience; general software or AI interests alone do not establish fit.
- Junior standing or higher; confirm academic-level interpretation with recruiting.
- An eight-month global reapplication restriction may apply after relevant FPGA assessments or interviews.
Your dates, from the source
- Posting dateNot confirmed
- Application deadlineNot confirmed
- Start dateNot confirmed
Missing dates stay unconfirmed. We do not infer interview schedules, rolling deadlines or a typical hiring timeline for this role.
Questions still to resolve
- Add your graduation month and year to compare the published window.
- Confirm enrollment in the degree program specified by this posting.
- E-Verify enrollment has not been matched to the hiring legal entity. Verify separately if relevant to STEM OPT.
- Compare your degree and enrollment status with the official requirements.
- Confirm that applications are still being accepted.
- No fixed deadline was confirmed; check the official posting before applying.
Graduation dates are compared only where exact bounds are stated. We do not infer CPT/OPT eligibility, work permission or H-1B timing from your academic year.
03 · Separate employer check
E-Verify
Hiring legal entity not independently confirmed
No official E-Verify legal-employer match has been verified. Immigration sponsorship does not establish E-Verify participation.
E-Verify participation is separate from H-1B sponsorship and the other STEM OPT requirements. An employer statement or an unmatched name is not a completed legal-employer verification.
04 · Prepare with a purpose
What to prepare and why
Show a tested digital-design project and explain timing, parallelism and latency tradeoffs. This is an FPGA/hardware engineering path, not a PM or general AI engineering placement.
Build a focused application
Use the recorded requirements to choose relevant projects and experience for your résumé.
Research the business
Connect the role to the company’s products and business before preparing interview examples.
Follow the source trail
Job / program ID: 8641352002 · last checked 2026-10-23
Read-only current official JD, employer jobs listing, and linked Apply page review; matched the job-specific Greenhouse identifier in the employer page HTML and employer public ATS listing. Embedded application could not be read. No login, data entry or submission.
The current complete official JD, live employer jobs listing, and matching official Apply page were reviewed. The Apply page loads its job-specific Greenhouse application dynamically. The separate embedded form could not be read with the research tool; no application acceptance or submission was verified.
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